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asic

OPEN FPGA, OPEN ASICS

DYNAMIC SCHEDULING IN VERILATOR - MILESTONE TOWARDS OPEN SOURCE UVM

Published:

Dynamic scheduling in Verilator UVM is a verification methodology traditionally used in chip design which has historically been missing from the open source landscape of verification-focused tooling. While new, open source approaches to verification have...
OPEN HARDWARE, OPEN ASICS, OPEN FPGA

RPC DRAM SUPPORT IN OPEN SOURCE DRAM CONTROLLER

Published:

DDR RAM and RPC DRAM comparison The Internet of Things is one of the areas that is hugely benefiting from miniaturization of semiconductor technologies, as more computing power can be encapsulated into increasingly smaller devices. Shrinking in size and requiring...
OPEN HARDWARE, OPEN ASICS, OPEN SOURCE TOOLS

ZGLUE TEAMS UP WITH ANTMICRO AND GOOGLE IN OPEN CHIPLET INITIATIVE

Published:

OCI It is becoming evident that the next level of advancement in chip-building can be achieved through open, modular and collaborative methodologies resulting in unmatched flexibility, ease of development and robustness of the...
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