Tagged as:

fpga-tools

OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

INTRODUCING CONSTRAINED RANDOMIZATION IN VERILATOR

Published:

Constrained randomization in Verilator illustration Large and complex SystemVerilog designs, such as CPUs, are difficult to test thoroughly, as there are many interesting signal combinations that influence a design’s behavior, including corner cases that are easy to overlook...
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

ANALYZE VERILATOR PROCESSES AND ASTS WITH THE ASTSEE SUITE

Published:

astsee logo Among other things, Antmicro’s work towards improving the vertical integration potential of customers designing ASIC solutions often sees us enhance one of the flagship open source projects in this space, Verilator, which complements...
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

ADDING PHYSICAL MEMORY PROTECTION TO THE VEER EL2 RISC-V CORE

Published:

PMP for VeeR EL2 - graphical interpretation Antmicro’s work with CHIPS Alliance’s Caliptra Root of Trust project, led by Google, AMD, NVIDIA, and Microsoft focuses around providing automated testing and verification infrastructure including code quality checks, code...
OPEN FPGA, OPEN SOURCE TOOLS

FULLY OPEN SOURCE FPGA DESIGN FOR SDI-MIPI VIDEO CONVERTER

Published:

Fully open source FPGA design for SDI-MIPI Video Converter illustration SDI is a popular industrial camera standard used in video broadcast, supporting transmission over a single coaxial cable. But embedded SoCs used in drone, robotics and IoT applications typically only support MIPI CSI-2 natively...
OLDER
CLOSE 

TAGS