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systemverilog

OPEN SOURCE TOOLS, OPEN FPGA, OPEN ASICS, OPEN CLOUD SYSTEMS

AUTOMATIC SYSTEMVERILOG LINTING IN GITHUB ACTIONS WITH VERIBLE

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Diagram depicting Verible integration with Github Actions With the recent advances in open source ASIC development tools such as Verible, it has become easier to automate tasks and boost developer productivity. The Verible linter is a static code analysis tool that has been helping...
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