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zynq

OPEN FPGA, OPEN SOURCE TOOLS

OPEN SOURCE HARDWARE ACCELERATOR SUBSYSTEM FOR FPGA/ASICS

Published:

Illustration depicting a chip with VEDLIoT logo Antmicro’s involvement in the VEDLIoT project, an EU-funded initiative aiming at providing a common platform for efficient Deep Learning in IoT has allowed us to develop several open AI/ML ecosystem tools and components which...
OPEN OS

SEL4 USERSPACE DEBUGGING WITH GDB EXTENSIONS IN RENODE

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Diagram depicting CAmkES sample application architecture Debugging is an integral part of the embedded systems development process especially in the context of userspace applications running inside an OS, where it can be difficult to follow the flow of the code. OS-aware debugging...
OPEN SOURCE TOOLS, OPEN FPGA

ADVANCED CO-SIMULATION WITH RENODE AND VERILATOR: ZYNQ AND FASTVDMA

Published:

Diagram depicting co-simulation of Zynq Co-simulation is extremely useful for developing complex systems, especially those targeting FPGA SoCs, where specialized IP cores often interact with advanced software running on the hard CPU. Co-simulation has been available...
OPEN HARDWARE, OPEN MACHINE VISION

ANTMICRO’S OPEN SOURCE SDI-TO-MIPI BRIDGE

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Antmicro’s open source SDI-to-MIPI bridge Antmicro’s software and hardware services often involve video data processing. The vision systems we have created for customers from various industries use a range of interfaces, however, the most popular embedded platforms...
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