OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

SYSTEMC CO-SIMULATION IN RENODE

Published:

SystemC co-simulation in Renode, hero image

SystemC is a C++-based system design and verification language and library that allows for modeling of hardware systems, widely used by IP vendors who often provide SystemC-based models for their blocks. Based on community demand, recently we have extended...

OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

INITIAL ASSERTION CONTROL SUPPORT IN VERILATOR

Published:

Initial assertion control support in Verilator

Antmicro is continuously working on improving productivity of ASIC design and verification workflows using open source tools as leaders of the CHIPS Alliance Tools Workgroup, as well as for customer and R&D projects. Extending Verilator with new verification...

OPEN HARDWARE, OPEN SOURCE TOOLS
OPEN HARDWARE, OPEN SOURCE TOOLS

INTERACTIVE COMPONENT HIGHLIGHTING ON THE OPEN HARDWARE PORTAL

Published:

Animation showing the highlighting of a component on the Open Hardware Portal

Antmicro’s Open Hardware Portal highlights several dozen of its open source hardware boards, spanning a range of different use cases, such as for video, AI. Perhaps less visibly but not less importantly, the OHP, also includes details of over 2200 hardware...

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