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risc-v

OPEN OS, OPEN SOURCE TOOLS

USING ZEPHYR RTOS AS A BOOTLOADER FOR LINUX ON RISC-V PLATFORMS

Published:

Zephyr as a bootloader for Linux on RISC-V Originally published on the Zephyr Project blog The Zephyr RTOS most often powers MCUs (with hundreds of supported platforms), taking the primary, user-facing role. But its versatility makes it a great fit for other, perhaps...
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

CPU RTL CO-SIMULATION IN RENODE

Published:

CPU RTL co-simulation in Renode Support for co-simulating HDL models in Renode with Verilator has been an integral part of the framework since the 1.7.1 release, introducing a new dimension of flexibility and allowing Renode to cover ASIC and FPGA SoC development...
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