Hardware Apr 16, 2026 Antmicro's open hardware SDI-Fiber Adapter for long-distance video transmission in high-EMI environments
ASICFPGA Apr 13, 2026 Implementing Dual-core Lockstep in the CHIPS Alliance VeeR EL2 RISC-V core for safety-critical applications
Renode Apr 2, 2026 Connecting Renode to the Internet on macOS through vmnet and socket-based networking
ASICSoftware Mar 31, 2026 CHIPS Alliance launches the SV Tools Project for open source development of SystemVerilog/UVM codebases
SoftwareHardwareRenode Mar 24, 2026 Antmicro supports Aethero next-gen space computers NxN and NxA with full-stack development around NVIDIA Jetson Orin and Jetson Thor edge AI platforms
Renode Mar 6, 2026 An experimental GUI for alternative interaction with the Renode simulation framework
Hardware Feb 24, 2026 Introducing Antmicro's open hardware OCuLink-to-10 GbE Adapter for demanding edge AI scenarios
Software Feb 12, 2026 Automated DAC signal integrity verification with eyescan tests and Protoplaster
ASICSoftware Feb 2, 2026 Timing path information in hierarchical static timing analysis of ASICs using OpenROAD
ASICFPGAHardwareSoftware Jan 23, 2026 Topwrap: better SystemVerilog support for complex designs, auto-validation, and support for AXI interconnects
Hardware Jan 23, 2026 Ruggedized Jetson AGX Thor Baseboard setup for robotics and industrial applications
ASICFPGASoftware Jan 13, 2026 Multi-objective optimization in AutoTuner for efficient ASIC design selection in OpenROAD
Software Dec 23, 2025 Graphics Rendering Visual Library (grvl) - a lightweight GUI library for Zephyr-based MCUs
FPGAHardwareSoftware Dec 16, 2025 Designing modular and reusable RISC-V SoCs with Topwrap and Guineveer