Fomu keystroke injector

Zynq mkbootimage open boot image generator

Coroutines for dynamic scheduling in Verilator

Open source data center Rowhammer tester

Software-driven ASICs using SkyWater Shuttle

SATA with open source FPGA tools

RISC-V vector instructions in Renode

Raviewer video data debugging tool

Sharing files between host and Renode

Kenning Runtime

100 Zephyr platforms in Renode’s Zephyr dashboard

OpenLane ASIC build flow with SV support

Debayerization blocks in FPGA

CFU support in Renode

Co-simulation for Zynq with Renode + Verilator

LEON3 support in Renode

FPGA Interchange format

Verible integration with GitHub Actions

Open source DDR test framework for Rowhammer

Open source custom GH Actions runners with GCP and Terraform

Open M.2 Smart IoT Module

Open source SystemVerilog tools in ASIC design

Rust peripheral support in Renode

Zephyr FPGA controller

Initial Bluetooth support for nRF52840 in Renode

High-end, cost-optimized Android devices on Snapdragon

DC-SCM compatible open source BMC platform

Advanced co-simulation with Renode & Verilator

Antmicro Open Source Portal launched

NVIDIA’s TX2 NX SoM compatible with Antmicro's Open Source Jetson Baseboard

Dynamic scheduling in Verilator - milestone towards open source UVM

Run Linux on BeagleV Starlight in Renode

Antmicro’s ARVSOM RISC-V module announced

Open hardware SDI-MIPI bridge available off the shelf

Renode 1.12 release

Scalenode - server-oriented baseboard for Raspberry Pi 4

ROS-based tester for tracking and detection algorithms

Open-source LPDDR4 test platform

Adopting embedded systems for smart factories

Renode-based CI for TensorFlow Lite MCU

Detection and tracking dataset generator

GitHub Actions self-hosted runners

3D vision pipeline

Using Renode for education, research and demonstration

High-throughput open source PCIe on VU19P

Distant-bes client

UltraScale+ Processing Module released as open source

VEDLIoT launch

Apalis Smart Vision Baseboard released as open source

Ibex support in Verilator/Yosys via UHDM/Surelog

Open FPGA tools and Renode for Core-V MCU

Betrusted’s Precursor and Renode - a user story

RISC-V Summit 2020

Renode 1.11 release

SkyTrack - smart detection and tracking system

RPC DRAM support in LiteDRAM

Multi-band wireless communication in Renode with Zolertia Firefly

FPGA tool performance framework

Open Jetson Nano / Xavier NX baseboard available for purchase

zGlue teams up with Antmicro and Google in Open Chiplet Initiative

Automatic CPU testing with Embench

Speech recognition with I²S in Zephyr and TensorFlow Lite

Linux GUIs on Zynq with FastVDMA, HDMI and Snickerdoodle

seL4 on RISC-V in Renode

Plug-and-play AI acceleration with Thunderbolt

Antmicro’s open source SDI-to-MIPI Bridge

Renode 1.10 release

Android on open Jetson Nano / Xavier NX baseboard

PolarFire SoC Icicle Kit with Antmicro’s HDMI board

Antmicro joins the OpenPOWER Foundation - Q&A

SweRV and open tooling

Jetson Nano / Xavier NX with 10Gb Ethernet Controller

SkyWater open PDK release

Renode 1.9: new platforms, RISC-V improvements, dual radio & more

Antmicro’s TX2 platform released as open hardware

Multi-core VexRiscv in Litex

Microwatt and the POWER ISA support in Renode

Updated Jetson Nano/Xavier NX open source baseboard

SystemVerilog linting and formatting in FuseSoC

Open source hardware dual camera module for stereovision

Open hardware FPGA video platform

Open HW QuickFeather board

Open computing at the edge: EW 2020

High-speed stereo camera for industrial use cases

CivetWeb in Zephyr

Single Object Tracking for ROS

SDI/HDMI to HDMI/MIPI smart converter/streamer

Speeding up builds with Remote Execution API

Open source Alvium drivers for TX2 (and Nano)

Renode support for QuickLogic EOS S3 SoC

Antmicro and zGlue release rapid turnaround chiplet-based GEM ASIC

TFLite in Zephyr

Open USB test suite

Antmicro exhibits at RISC-V Summit 2019

Open SystemVerilog Test Suite

Jetson Xavier™ NX with Antmicro's Open Source Jetson baseboard

EtherBone support in Renode

pyvidctrl tool for managing camera settings

Singularity at Antmicro

Time Sensitive Networking in Zephyr

Renode 1.8: EtherBone co-simulation, more RISC-V platforms

Updated Jetson Nano Baseboard + ALVIUM cameras

FastVDMA: an open DMA controller by Antmicro

Renode + Verilator HDL co-simulation

Zephyr on Zynq UltraScale+ Cortex-R5

Multi-core debugging with GDB in Renode

Automated cloud builds for edge AI devices

Verilog simulation with Cocotb and Verilator

Get Started with Zephyr on RISC-V

Renode 1.7 with Microchip SAME70, TSN, Verilator co-simulation

Open Jetson Nano AI board gets Data Modul HMI

Antmicro's open Android BSP for Apalis TK1

Security IP HW/SW co-design with RISC-V and Renode

Open hardware Coral baseboard

Open hardware NVIDIA Jetson nano baseboard

Open digital design

Renode 1.6 with RISC-V PolarFire FPGA SoC

Jetson Xavier + Antmicro AI + Allied Vision cameras

i.MX8 + Movidius AI accelerator

Open Triple Modular Redundancy demonstrator with Zephyr on UltraScale+