SoftwareASIC
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Renode
Improved simulation-based testing of Google's ChromiumOS FPMCU with Renode support for the RISC-V Andes D25F core and the related Egis ET171 SoC
SoftwareASIC
Initial implementation of four-state logic in the open source Verilator RTL simulator
HardwareASICFPGA
Improvements to Antmicro's DC-SCM 2.1 reference platform: LTPI support, DC-SCM breakout board rev. 2.0, and Fru2Graph
Hardware
Simulating active cooling using a Computational Fluid Dynamics-based flow
Hardware
Antmicro's open hardware SDI-Fiber Adapter for long-distance video transmission in high-EMI environments
ASICFPGA
Implementing Dual-core Lockstep in the CHIPS Alliance VeeR EL2 RISC-V core for safety-critical applications
Renode
Connecting Renode to the Internet on macOS through vmnet and socket-based networking
HardwareSoftware
Simplifying mechanical BOM generation and management with STEPhen
ASICSoftware
CHIPS Alliance launches the SV Tools Project for open source development of SystemVerilog/UVM codebases
Software
Porting Zephyr RTOS to Synaptics SR100 AI MCUs
SoftwareHardwareRenode
Antmicro supports Aethero next-gen space computers NxN and NxA with full-stack development around NVIDIA Jetson Orin and Jetson Thor edge AI platforms
ASICSoftware
Optimizing sv-bugpoint with speculative minimization algorithms
Renode
An experimental GUI for alternative interaction with the Renode simulation framework
Renode
Renode support for the high-performance, low power NXP i.MX RT700 MCU
Hardware
Introducing Antmicro's open hardware OCuLink-to-10 GbE Adapter for demanding edge AI scenarios
Software
Automated DAC signal integrity verification with eyescan tests and Protoplaster
Software
Improved Zephyr Virtual Filesystem for porting applications to Zephyr
ASICSoftware
Timing path information in hierarchical static timing analysis of ASICs using OpenROAD
ASICFPGAHardwareSoftware
Topwrap: better SystemVerilog support for complex designs, auto-validation, and support for AXI interconnects
Hardware
Ruggedized Jetson AGX Thor Baseboard setup for robotics and industrial applications
ASICFPGASoftware
Multi-objective optimization in AutoTuner for efficient ASIC design selection in OpenROAD
SoftwareASIC
Automated bus performance analysis with Busperf
Software
Exporting data from the girdl Ghidra plugin into a debugger
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