SPI driver for OpenRISC eCos
Published:
After a short break, this week we are going to deal with SPI support for the OpenRISC eCos port,
To add the driver to the eCos build, the CYGPKG_IO_SPI package has to be added as follows:
ecosconfig add CYGPKG_IO_SPI
ECos requires that each device connected to the SPI bus is properly described. Our driver provides a macro for this purpose:
CYG_DEVS_SPI_OPENCORES_SIMPLE_SPI_DEVICE(
name, // handler name of the device
bus, // SPI bus, numbering starts at 0
cs, // CS line, numbering starts at 0
polarity, // polarity (1 or 0)
phase, // phase (1 or 0)
freq, // maximum SCK frequency measured in hertz
cs_to_tran, // minimum delay between CS signal and start
// of the transmission, measured in microseconds
tran_to_cs, // minimum delay between the end of the transmission
// and the release of CS signal, measured in microseconds
tran_to_tran // minimum delay between transmission of consecutive
// bytes, measured in microseconds
);
For example, to add a m25pxx flash memory, fairly common on FPGA boards, connected to bus 0 chip-select 0, we can describe it as follows:
CYG_DEVS_SPI_OPENCORES_SIMPLE_SPI_DEVICE(
m25pxx_spi, 0, 0, 0, 0, 1000000, 1, 1, 1
);
It is worth noting that eCos already has a driver for this memory type. To use it you have to add the CYGPKG_DEVS_FLASH_SPI_M25PXX package:
ecosconfig add CYGPKG_DEVS_FLASH_SPI_M25PXX
And connect the SPI device to it:
CYG_DEVS_FLASH_SPI_M25PXX_DRIVER (
m25pxx_drv, 0, &m25pxx_spi
);
Note: Get the relevant code from our mirror of eCos-openrisc on Antmicro’s github account.
The eCos provided by Antmicro now supports:
- UART
- SPI
- Ethernet
- SDIO
Stay with us for more updates about OpenRISC, FPGA and open source in embedded systems.
