Hardware design of advanced video processing devices is one of the key areas of activity at Antmicro. With a never-ending pursuit of higher data throughput, signal integrity moves to the forefront of challenges in modern PCB...
Antmicro is happy to announce the next, 1.14 release of our open source Renode simulation framework, including lots of new developments originating from both customer and R&D projects, along with community contributions. Since...
Hardware Description Languages (HDLs), such as Verilog and SystemVerilog, are used to express the behavior of digital electronic circuits for field-programmable gate arrays (FPGAs) and application-specific integrated circuits...
OPEN SOURCE TOOLS, OPEN HARDWARE, OPEN FPGA, OPEN ASICS
Customers interested in building new industrial or consumer devices, typically involving one or more PCBs and based on Linux, Zephyr or Android (or even all of them at the same time), often approach Antmicro before they know...
Antmicro’s work with camera systems often results in new reusable tools and libraries helpful for debugging video devices and applications. Some examples of such tools for working with v4l2 pipelines such as grabthecam, farshow
Support for co-simulating HDL models in Renode with Verilator has been an integral part of the framework since the 1.7.1 release, introducing a new dimension of flexibility and allowing Renode to cover ASIC and FPGA SoC development...
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