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vexriscv

OPEN FPGA, OPEN HARDWARE

RUNNING LINUX WITH QUAD-CORE SMP IN LITEX/VEXRISCV ON ARTY A7

Published:

Quad-core VexRiscv FPGAs can be seen as a bridge between the domains of hardware and software as their hardware operation can be reprogrammed using code, giving developers unprecedented flexibility. In advanced products that Antmicro helps its...
OPEN SOURCE TOOLS, OPEN OS, EDGE AI, OPEN FPGA

TENSORFLOW LITE IN ZEPHYR ON LITEX/VEXRISCV

Published:

TensorFlow Lite and Zephyr logos While much of the focus for the recent developments in AI has been on cloud-centric implementations, there are many use cases where AI algorithms have to be run on small and resource constrained devices. Google’s TensorFlow...
OPEN SOURCE TOOLS, OPEN NETWORKING, OPEN FPGA

RENODE 1.8 RELEASE WITH MULTI-CORE GDB SUPPORT AND NEW RISC-V PLATFORMS

Published:

Renode 1.8 The newest release of Renode, Antmicro’s open source multi-node simulation framework, adds new exciting pieces to your toolbox, along with support for even more RISC-V platforms and CPUs. With these new capabilities it’s even...
OPEN OS, OPEN ISA

OPEN SOURCE ZEPHYR RTOS FEATURED IN RISC-V GETTING STARTED GUIDE

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Zephyr RTOS + RISC-V In today’s rapidly evolving IoT and embedded ecosystem developers have the ability to choose from a variety of platforms and tools to design and build solutions that meet their unique needs and use cases. Zephyr Project is...
OPEN SOURCE TOOLS, OPEN NETWORKING, OPEN FPGA

RENODE 1.7 WITH NEW SOFT PLATFORMS AND TSN/PTP SUPPORT RELEASED

Published:

Renode 1.7 Antmicro has recently released Renode 1.7 and 1.7.1, one of the largest updates yet of the open source multi-node simulation framework that has been gaining popularity and showcasing new market implementations in the RISC-V...
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