Our open source Renode simulator has been helping our customers develop products using ARM, RISC-V and - recently - Xtensa-based SoCs, providing hardware-software co-development and CI-driven testing capabilities for a variety...
At Antmicro we work with a large variety of FPGA chips, starting from very large FPGAs we’re using for prototyping ASIC systems, to super small, resource constrained devices to be deployed at the very edge.
One of such devices...
Real-world FPGAs designs often require high rate transmission protocols such as PCIe, USB and SATA which rely on high speed transceivers for external communication. These protocols are used to interface with various devices...
Co-simulating HDL has been possible in Renode since the 1.7.1 release, but the functionality - critical for hardware/software co-development as well as FPGA use cases - is constantly evolving based on the needs of our customers...
OPEN SECURITY / SAFETY, OPEN ISA, OPEN FPGA IP, OPEN TOOLCHAINS
As more and more companies, organizations and educational institutions are using Renode’s hardware simulation and testing capabilities, we get a lot of questions along the lines of “Can I run my board in Renode and how complicated...
FPGAs can be seen as a bridge between the domains of hardware and software as their hardware operation can be reprogrammed using code, giving developers unprecedented flexibility. In advanced products that Antmicro helps its...
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