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OPEN SOURCE TOOLS, OPEN ASICS

INITIAL OPEN SOURCE SUPPORT FOR UVM TESTBENCHES IN VERILATOR

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Running simple UVM testbenches in Verilator Leading the efforts of the Tools Workgroup in CHIPS Alliance, across a variety of customer projects, as well as own R&D, at Antmicro we are actively looking for and capturing the productivity enhancements that can be achieved...
OPEN FPGA, OPEN SOURCE TOOLS

FULLY OPEN SOURCE FPGA DESIGN FOR SDI-MIPI VIDEO CONVERTER

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Fully open source FPGA design for SDI-MIPI Video Converter illustration SDI is a popular industrial camera standard used in video broadcast, supporting transmission over a single coaxial cable. But embedded SoCs used in drone, robotics and IoT applications typically only support MIPI CSI-2 natively...
OPEN SOURCE TOOLS, OPEN OS, OPEN ISA

RENODE 1.14 WITH ARMV8 SUPPORT, IMPROVED CO-SIMULATION AND NEW PLATFORMS

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Renode 1.14 illustration Antmicro is happy to announce the next, 1.14 release of our open source Renode simulation framework, including lots of new developments originating from both customer and R&D projects, along with community contributions. Since...
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

DPI SUPPORT IN RENODE FOR HDL CO-SIMULATION WITH VERILATOR AND QUESTA

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DPI support in Renode for HDL co-simulation Hardware Description Languages (HDLs), such as Verilog and SystemVerilog, are used to express the behavior of digital electronic circuits for field-programmable gate arrays (FPGAs) and application-specific integrated circuits...
OPEN SOURCE TOOLS, OPEN HARDWARE, OPEN FPGA, OPEN ASICS

BUILD EMBEDDED SYSTEMS INTERACTIVELY WITH ANTMICRO'S VISUAL SYSTEM DESIGNER

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Visual System Designer Customers interested in building new industrial or consumer devices, typically involving one or more PCBs and based on Linux, Zephyr or Android (or even all of them at the same time), often approach Antmicro before they know...
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