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risc-v

OPEN HARDWARE

OPEN SOURCE SYSTEM ON MODULE WITH MICROCHIP POLARFIRE SOC

Published:

Photo of the PolarFire SoM The PolarFire SoC was the world’s first Linux-enabled mass market multi-core RISC-V SoC, originally made available pre-silicon by Microchip through Antmicro’s Renode simulation framework. Thanks to the ongoing collaboration...
OPEN CLOUD SYSTEMS, OPEN SOURCE TOOLS

EFFICIENT OTA UPDATES WITH DELTA PACKAGES IN REMOTE DEVICE FLEET MANAGER

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Illustration depicting delta updates Antmicro’s engineering services cover the entire cycle of product development – from choosing suitable hardware, through preparing BSPs (board support packages), to in-field deployment and fleet management. We help build complete...
OPEN ISA, OPEN SIMULATION

RECENT DEVELOPMENTS IN THE ZEPHYR PORT FOR RISC-V

Published:

Visualization of RISC-V running in Zephyr As the open source Zephyr RTOS continues to grow in popularity, with most of the leading semiconductor vendors supporting the project as members, so does the open RISC-V ISA see ever-increasing adoption in real-world use cases...
OPEN SOURCE TOOLS, OPEN SIMULATION, OPEN SOFTWARE LIBRARIES

IMPROVING DATA SOURCES AND TESTS IN THE RENODE ZEPHYR DASHBOARD AND RENODEPEDIA

Published:

A representation of the updates to the Zephyr and U-Boot Dashboards Since its launch in 2021, we’ve been developing the Renode Zephyr Dashboard, a CI system combining structured data obtained from the Zephyr RTOS with our own Renode simulation framework, running a range of samples on over 470...
OPEN ASICS, OPEN SOURCE TOOLS

SPEEDING UP OPENROAD FOR FAST TURNAROUND DESIGN FEEDBACK

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OpenROAD optimizations illustration The OpenROAD project provides an open source ASIC toolchain that reduces the entry barriers to the field of hardware development and allows fast-turnaround feedback about your design, helping increase productivity of silicon...
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