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After a longer while, we are excited to announce that the next release of Renode is here. Since the previous release we’ve been busy working with many customers and partners, including Google, Microchip and Betrusted, on various...
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Our open source Renode simulator has been helping our customers develop products using ARM, RISC-V and - recently - Xtensa-based SoCs, providing hardware-software co-development and CI-driven testing capabilities for a variety...
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At Antmicro we are often faced with the challenge of designing video processing devices with a low power and physical footprint. This usually implies using an FPGA for implementing repeating pipelined operations necessary for...
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The Xtensa architecture, originally from Tensilica (now part of Cadence), is the base for a family of licensable, configurable cores, enabling easy customization.
This is especially useful in certain applications such as...
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At Antmicro we work with a large variety of FPGA chips, starting from very large FPGAs we’re using for prototyping ASIC systems, to super small, resource constrained devices to be deployed at the very edge.
One of such devices...
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The growing cost and complexity of advanced nodes, supply chain issues and demand for silicon independence mean that the ASIC design process is in need of innovation. Antmicro believes the answer to those challenges is bound...
