In recent years Antmicro has been working for customers within the CHIPS Alliance’s Caliptra Workgroup, led by AMD, Google, Microsoft and NVIDIA, to maintain and gradually enhance the RISC-V VeeR EL2 CPU core that is used in...
The PolarFire SoC was the world’s first Linux-enabled mass market multi-core RISC-V SoC, originally made available pre-silicon by Microchip through Antmicro’s Renode simulation framework. Thanks to the ongoing collaboration...
The openness and customizability of the RISC-V ISA has encouraged its use across a variety of scenarios, such as supporting cores in larger systems, standalone embedded MCUs and even many-core server AI processing solutions
Antmicro’s engineering services cover the entire cycle of product development – from choosing suitable hardware, through preparing BSPs (board support packages), to in-field deployment and fleet management. We help build complete...
As the open source Zephyr RTOS continues to grow in popularity, with most of the leading semiconductor vendors supporting the project as members, so does the open RISC-V ISA see ever-increasing adoption in real-world use cases...
OPEN SOURCE TOOLS, OPEN SIMULATION, OPEN SOFTWARE LIBRARIES
Since its launch in 2021, we’ve been developing the Renode Zephyr Dashboard, a CI system combining structured data obtained from the Zephyr RTOS with our own Renode simulation framework, running a range of samples on over 470...
OLDER