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risc-v

OPEN HARDWARE, OPEN AI

VERY EFFICIENT DEEP LEARNING IN IOT PROJECT WITH RISC-V AND RENODE

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VEDLIoT logo We are happy to announce our involvement in ‘Very Efficient Deep Learning in IoT’ (VEDLIoT) - a project funded by the European Commission and coordinated by Bielefeld University’s CoR-Lab, launched at the end of 2020. Comprising...
OPEN FPGA, OPEN SOURCE TOOLS, OPEN ISA

OPEN SOURCE FPGA TOOLS AND RENODE SUPPORT FOR CORE-V MCU

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Core-V and Renode For over a year now we have been working together with QuickLogic towards supporting their FPGA devices in open source FPGA tooling. This is the first time in history where an FPGA vendor has gotten directly involved in enabling...
OPEN SECURITY / SAFETY, OPEN ISA, OPEN FPGA IP, OPEN TOOLCHAINS

BETRUSTED’S PRECURSOR AND RENODE - A USER STORY

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Bestrusted and Renode logos As more and more companies, organizations and educational institutions are using Renode’s hardware simulation and testing capabilities, we get a lot of questions along the lines of “Can I run my board in Renode and how complicated...
OPEN ISA, OPEN TOOLING, OPEN HARDWARE

RISC-V SUMMIT 2020 - VIRTUAL BOOTH, KEYNOTE SESSION AND TALKS

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Antmicro and RISC-V logos The virtual RISC-V Summit is approaching fast, promising to put a spotlight on a range of interesting, real-life use cases and implementations of the groundbreaking open source processor architecture, with a number of informative...
OPEN HARDWARE, OPEN ASICS, OPEN SOURCE TOOLS

ZGLUE TEAMS UP WITH ANTMICRO AND GOOGLE IN OPEN CHIPLET INITIATIVE

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OCI It is becoming evident that the next level of advancement in chip-building can be achieved through open, modular and collaborative methodologies resulting in unmatched flexibility, ease of development and robustness of the...
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