SystemC co-simulation in Renode


Topics: Open source tools, Open ASICs, Open FPGA

SystemC is a C++-based system design and verification language and library that allows for modeling of hardware systems, widely used by IP vendors who often provide SystemC-based models for their blocks. Based on community demand, recently we have extended Renode, our open source simulation framework with support for SystemC Transaction Level Modeling (TLM) - a standard SystemC interface designed to drive memory-mapped communication, providing interoperability between various components. By including support for SystemC, we extended the co-simulation integration portfolio of Renode that already includes direct integration with Verilator and a DPI-based interface for multiple simulators. This makes Renode even more accessible for engineering teams interested in pre-silicon development with a mix of custom-made and off-the-shelf blocks.

In this article, we will describe the integration details, including a SystemCPeripheral model that acts as a proxy, allowing Renode to interact with SystemC models as if they were any other peripheral. We also introduce a repository with SystemC integration examples showcasing the current support for the library, including various models and demos that illustrate virtual time synchronization, interrupt handling, a basic DMA controller performing memory-to-memory transfers, delayed transactions and more, all built and tested within a CI system using easy-to-follow Robot tests.

SystemC co-simulation in Renode, hero image

Running SystemC peripherals in Renode

Renode now has support for a generic SystemCPeripheral model that acts as a proxy between C# blocks and SystemC external models, as well as for a thin integration layer on the SystemC side. The layer is introduced by a SystemC module providing a renode_bridge class implementing the Renode-SystemC protocol interface.

In order to integrate with external SystemC modules, we need to use the provided renode_bridge and connect it to the rest of the system. Technically speaking, Renode does not run SystemC models on its own – just like in case of Verilator, we treat them as a separate simulator we interface with over TCP sockets.

From Renode’s perspective, SystemC models can be interacted with just like any other peripheral, meaning that you can have complex systems with multiple SystemC models running alongside Verilator peripherals or “classic” Renode peripherals.

SystemC integration example showcase

To showcase the extent of the added support, we prepared a repository with SystemC integration examples. It contains eight standalone examples, including externally-written SystemC models as well as ones created by us and comes with a CI setup that builds all the necessary components:

  • SystemC-based simulators
  • Zephyr-based firmware used for testing
  • Renode configuration scripts
  • Robot test scripts.

Each of the demos listed below showcases a different aspect of the integration:

  • interrupts - Interrupt handling – not strictly defined by TLM, but we implemented a solution that is often used to handle interrupts in SystemC
  • dma - DMA transactions originating from SystemC modeled peripherals and directed towards Renode
  • multiple peripherals - Complex system with multiple SystemC peripherals and interconnections between them handled by Renode
  • timesync - Virtual time synchronization example between SystemC and Renode
  • transaction-delay - Delayed transactions (a feature of SystemC allowing you to model long-running processing)
  • lt - Integration of Renode with a non-trivial SystemC model – adaptation of the “loosely-timed” example, which is part of the official SystemC-2.3.4 distribution
  • tlm-non_blocking - Simple illustration of non-blocking TLM interface usage
  • direct-connections - Direct communication between SystemC peripherals, outside of the system bus

DMA controller demo

Below we analyze the DMA example mentioned above in detail. It shows a rudimentary DMA controller (DMAC) peripheral implemented in SystemC and connected to an STM32 Mini F401 MCU simulated in Renode and illustrates SystemC-to-Renode bus communication and handling of Renode-initiated GPIO signals.

In order to build and run the example, make sure you have the following dependencies available in your system:

  • Renode
  • SystemC dynamic libraries, including development files (libsystemc-dev package on Debian)
  • C++ compiler (we tested the implementation with Clang, GCC)
  • CMake

First, clone the repository and navigate to the DMA example folder:

git clone
cd renode-systemc-examples/examples/dma

From there, follow the standard CMake build process:

mkdir build
cd build
cmake .. -DUSER_RENODE_DIR=<absolute path to Renode>

Navigate back to the dma folder and run the built example:

cd ..
renode-test dma.robot

Here, the Renode script configures the DMAC by setting the appropriate source, destination and data length registers. It then starts the memory transfer by writing to the DMAC control register. Next, DMAC is informed that the bus is free by Renode raising a “bus free” signal on one of the GPIO pins on the SystemC peripheral. DMAC then performs a memory-to-memory transfer according to the setup.

Renode-SystemC communication diagram

You can run all of the examples available in the repository in an analogous fashion.

This simple demo is just a sneak peek of Renode’s powerful integration and co-simulation capabilities. Renode lets engineers model complex systems, mix components provided by multiple parties and work on software targeting hardware designs that are still in the exploration/design phase, and we are helping many silicon development teams build their next-gen systems. This includes many emerging RISC-V systems (the excellent support for which was outlined in a recent article) or mixed multi-ISA systems, which Renode can easily support.

Accelerate SoC design with Renode

The SystemC integration described above is yet another important step in opening up Renode and other parts of Antmicro’s open source toolkit to even more development and testing scenarios and solutions prevalent across the silicon industry, letting you accelerate development with full control over design workflow.

If you’d be interested to integrate Renode to enable a rapid, highly customizable development and deterministic testing environment in your existing SystemC-based workflows, or build on top of our open source tools portfolio to create completely new flows which address your disruptive silicon use case, contact us at

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