OPEN SOURCE TOOLS
OPEN SOURCE TOOLS

FUZZING ZEPHYR WITH AFL AND RENODE

Published:

Fuzzing Zephyr with AFL and Renode illustration

Fuzzing is an automated testing technique aimed at detecting problems like crashes or memory leaks in software by feeding it with invalid, often random input. It is especially valuable in safety-critical use cases, e.g. in the medical or automotive industries...

OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

DPI SUPPORT IN RENODE FOR HDL CO-SIMULATION WITH VERILATOR AND QUESTA

Published:

DPI support in Renode for HDL co-simulation

Hardware Description Languages (HDLs), such as Verilog and SystemVerilog, are used to express the behavior of digital electronic circuits for field-programmable gate arrays (FPGAs) and application-specific integrated circuits (ASICs). The HDL source can...

OPEN SOURCE TOOLS, OPEN HARDWARE, OPEN FPGA, OPEN ASICS
OPEN SOURCE TOOLS, OPEN HARDWARE, OPEN FPGA

BUILD EMBEDDED SYSTEMS INTERACTIVELY WITH ANTMICRO'S VISUAL SYSTEM DESIGNER

Published:

Visual System Designer

Customers interested in building new industrial or consumer devices, typically involving one or more PCBs and based on Linux, Zephyr or Android (or even all of them at the same time), often approach Antmicro before they know what exact components they want...

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