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A more collaborative, open and software driven ASIC design methodology pioneered by the CHIPS Alliance requires an open source tooling stack to enable sharing of workflows, artifacts and fostering a free exchange of insights and improvements.
While internally...
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The usual practice in FPGA development is to treat bitstreams as proprietary firmware, but through its work Antmicro is showing how a more software-centric and open source-driven methodology can offer more control and significant productivity gains to customers...
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Antmicro’s AI projects typically involve different video input sources, including MIPI CSI-2 cameras from various camera vendors. Thanks to their broad offering of SONY sensors, the German imaging component supplier FRAMOS is a common choice in this ecosystem...
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Machine learning typically operates on large amounts of data which often has to be moved back and forth between processing nodes and storage. This generates bottlenecks and costs in terms of both power and bandwidth. One trend is seeing compute units (CPUs...
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Antmicro’s work with camera systems often results in new reusable tools and libraries helpful for debugging video devices and applications. Some examples of such tools for working with v4l2 pipelines such as grabthecam, farshow, pyrav4l2 and Raviewer can...
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Support for co-simulating HDL models in Renode with Verilator has been an integral part of the framework since the 1.7.1 release, introducing a new dimension of flexibility and allowing Renode to cover ASIC and FPGA SoC development use cases. Renode is...
