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Verilator is a popular open source SystemVerilog simulator and one of the key tools in the ASIC and FPGA ecosystem, which Antmicro is actively using and developing, e.g. by enabling co-simulation with Renode or Cocotb integration. It’s also one of the fastest...
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Our work together with Google and the world’s research community on detecting and mitigating the Rowhammer problem in DRAM memories has been proving that the challenge is far from being solved and a lot of systems are still vulnerable.
The DDR Rowhammer...
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The growing cost and complexity of advanced nodes, supply chain issues and demand for silicon independence mean that the ASIC design process is in need of innovation. Antmicro believes the answer to those challenges is bound to come from the software-driven...
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Real-world FPGAs designs often require high rate transmission protocols such as PCIe, USB and SATA which rely on high speed transceivers for external communication. These protocols are used to interface with various devices such as graphics cards and storage...
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Building on top of the flexibility that was the original premise of Renode, our open source simulation framework has for some years now been used for pre-silicon development, architectural exploration and hardware-software co-design.
Using Renode for these...
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Antmicro is involved in many projects where video processing is the key focus - from SDI-enabled AV equipment, through multi-camera robotics systems, biometric identifications devices to VR and medical cameras.
When working with off-the-shelf video sources...
