Field Programmable Gate Arrays (FPGAs) have been around for several decades, but historically development of toolchains targeting specific platforms was done in separate ecosystems and driven by the vendors themselves. Only in recent years, the development...
OPEN SOURCE TOOLS, OPEN FPGA, OPEN ASICS, OPEN CLOUD SYSTEMS
With the recent advances in open source ASIC development tools such as Verible, it has become easier to automate tasks and boost developer productivity. The Verible linter is a static code analysis tool that has been helping us and our collaborators to...
Rowhammer is a hardware vulnerability that affects DRAM memory chips and can be exploited to modify memory contents, potentially providing root access to the system. It occurs because Dynamic RAM consists of multiple memory cells packed tightly together...
As we continue our push for more software-driven hardware development as part of our work within CHIPS Alliance and RISC-V, we see an increasing need for scalable and flexible CI solutions that can be used with a mix of open source and proprietary components...
With the rise of ever more efficient and cost-optimized edge AI technologies, the possibilities for connecting the multitude of smart sensor devices into intelligent networks via gateways are now more abundant than ever. The way we at Antmicro see things...
OPEN SOURCE TOOLS, OPEN FPGA, OPEN ASICS, OPEN ISA
Open source hardware is undeniably undergoing a renaissance whose origin can be traced to the establishment of RISC-V Foundation (later redubbed RISC-V International). The open ISA and ecosystem, in which Antmicro participated since the beginning as a Founding...