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Antmicro is working with a number of FPGA and ASIC projects, where the constraints of the hardware platform require efficient data transfer mechanisms. The full control over the entire design process offered by open source...
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This year’s Zephyr Developer Summit is approaching fast and as a Diamond Sponsor of the event, Antmicro will be bringing the flexibility and cross-platform nature of the open source RTOS into the spotlight. During the event...
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At Antmicro we strongly believe that open source flows are key to bringing software-driven innovation into the ASIC space, in order to build a collaborative ecosystem and scalable, reproducible and publicly available components...
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Originally issued by CHIPS Alliance.
New workgroup draws support from industry leaders as the open FPGA toolchain matures
SAN FRANCISCO, Feb. 17, 2022 – CHIPS Alliance, the leading consortium advancing common and open...
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At Antmicro we work with a large variety of FPGA chips, starting from very large FPGAs we’re using for prototyping ASIC systems, to super small, resource constrained devices to be deployed at the very edge.
One of such devices...
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Verilator is a popular open source SystemVerilog simulator and one of the key tools in the ASIC and FPGA ecosystem, which Antmicro is actively using and developing, e.g. by enabling co-simulation with Renode or Cocotb integration
