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Although new ASIC design methodologies and tools such as Chisel are on the rise, most ASIC projects still use SystemVerilog, the support of which in open source tools has traditionally lagged behind. This is unfortunate, as...
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USB is often a daunting topic for developers, and implementing support for it from scratch is a time consuming task. When the expected result is more complicated than a USB-to-serial bridge, the solution would be to either...
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At Antmicro, we work with improving development flows for both software, hardware, FPGA and ASIC design, for which we use, contribute to and produce a wide variety of open source tools.
Verilog, SystemVerilog and open tooling
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So far when presenting Renode we mostly focused on using it as a separate tool that provides a closed simulated universe.
This approach has several advantages including ease of deployment, full control over all elements of...
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FastVDMA is an open source DMA (Direct Memory Access) controller developed at Antmicro.
One of the main motivations leading to the design of an open source DMA controller was the lack of portable open source alternatives to...
