Published:
When developing complex FPGA designs and custom SoCs, simulating and testing HDL designs in a larger context is necessary to accurately replicate real use cases. For fast iteration, you can combine cycle-accurate RTL simulation...
Published:
Creating Machine Learning models for deployment on constrained devices requires a considerable number of manual tweaks. Developers need to take into account the size and compute constraints of the target platform to adjust...
Published:
Antmicro’s automotive customers are using the versatile simulation capabilities of Renode for developing and testing multi-node systems to accelerate the transition towards software-defined vehicles. The framework offers determinism...
Published:
SystemRDL is a standard from the Accelera initiative used to describe the register layout of hardware in order to provide a single source of truth for hardware and software artifacts. As a single, human-writeable and readable...
Published:
The Texas Instruments MSP430 is a family of MCUs with its own custom ISA that enables ultra-low-power use cases. With a long history of supporting a breadth of products, including devices deployed in space, the most popular...
Published:
Renode is typically used to test and debug complex hardware-software systems, where having a tight interactive debugging feedback loop and a visual overview of the state of the system and registers are key. Renode’s superpower...
