Large and complex SystemVerilog designs, such as CPUs, are difficult to test thoroughly, as there are many interesting signal combinations that influence a design’s behavior, including corner cases that are easy to overlook...
Among other things, Antmicro’s work towards improving the vertical integration potential of customers designing ASIC solutions often sees us enhance one of the flagship open source projects in this space, Verilator, which complements...
Leading the efforts of the Tools Workgroup in CHIPS Alliance, across a variety of customer projects, as well as own R&D, at Antmicro we are actively looking for and capturing the productivity enhancements that can be achieved...
Hardware Description Languages (HDLs), such as Verilog and SystemVerilog, are used to express the behavior of digital electronic circuits for field-programmable gate arrays (FPGAs) and application-specific integrated circuits...
Digital circuits are becoming more and more complicated due to constant technology development and increasing user expectations. In response to this growing complexity, development tools that provide a higher level of abstraction...
Verilator can boast the status of one of the most widely used free and open source digital design tools for ASIC and FPGA development. To stay on top of the ever-increasing complexity of ASIC and FPGA devices, as users and...
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