The OpenROAD ASIC design toolchain consists of a number of tools and modules, dedicated for various stages in a typical RTL to GDS flow, such as floorplanning, placement, or routing. It also includes utility modules that can...
Universal Verification Methodology (UVM) is one of the most popular verification methods in digital design, focusing on standardization and reusability of verification IP and environments. For the last few years, Antmicro has...
Monitoring code coverage in digital design projects requires tracking both traditional software metrics such as executed code lines and visited branches, as well as more use-case specific concepts such as bit field toggles...
Reducing power usage is a major aspect of chip design, important especially for energy-efficient systems and battery-powered devices. A significant amount of the power used by a typical chip is consumed by gate switching, and...
Power consumption is a major aspect of chip design, and the ability to reliably and efficiently predict it can save a lot of engineering cycles. While it is difficult to predict the exact consumption upfront without delving...
Antmicro has been providing engineering support for Verilator in a variety of ASIC-related projects, which often include complex, state-of-the-art designs and take a lot of time time and memory to run. Normally, when generating...
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