Antmicro advocates open digital design at Embedded World 2019


Topics: Open hardware, Open machine vision, Open FPGA

Antmicro on Embedded World 2019

As new opportunities unfold for modern edge computing and the bold concept of open source digital design is paving its way through the silicon industry, Antmicro is kicking into high gear with new platforms and new partnerships which we will be proudly presenting at Embedded World 2019 in Nuremberg, Germany from February 26th to 28th.

This calls for an adequate presence at the leading embedded event in Europe - this year, join us at Antmicro’s own, 35m2 booth located in Hall 4A at booth 4A/621, for a variety of technology demonstrators spanning from edge AI and multi-camera solutions to open RISC-V platforms and Renode, the open source multinode simulation framework gaining popularity among our partners, customers and community developers.

Edge AI on the Nvidia Jetson series

Nvidia Xavier with Allied VisionAs many as three NVIDIA demos will showcase the breadth of applications our customers have been tasking us with throughout our experience with every iteration of the Jetson series to date.

The latest and most powerful Jetson Xavier will be in the spotlight of course, in Antmicro’s demo setup featuring Allied Vision’s award-nominated ALVIUM camera and running an optimized Deep Neural Net for detecting and classifying objects and people in real-time. The demonstrator will be shown in parallel at Allied Vision’s booth 3A/418, highlighting the deep collaboration between Allied Vision and Antmicro around support and project services for practical adoption of ALVIUM on the Jetson platform and beyond. Both Antmicro and Allied Vision have been invited to participate in the expert panel “Embedded Vision & Machine Learning: new architectures and technologies boosting (new) vision applications” on Wednesday, February 27th at 10:30 AM in Forum Hall 2.

Another Jetson demonstrator at our main booth will feature Antmicro’s TX2 Deep Learning Kit in a live feed 6 x MIPI CSI-2 camera setup. While Xavier is definitely targeted at very high-end applications, the Jetson TX2 is still an extremely useful and powerful GPGPU edge platform that can handle demanding in-field cases, such as multi-camera UAVs. Interestingly, having built a number of drones for our customers using the NVIDIA Jetson platform, we are now also involved in an NVIDIA-based drone identification and tracking platform for the acclaimed SkyWall300 counter-drone defense system that will also be featured at our main booth.

Finally, the less power-consuming but also CUDA-enabled TK1 Smart Vision Kit from Antmicro will be shown at one of our pods, running a demo image of our industrial Android for embedded devices. Antmicro offers BSP and dedicated software development services for modern open source operating systems, including Linux, Zephyr and Android, and we are seeing an increasing number of customers embracing the latter with its intuitive user interface and standardized programming APIs. For those wanting to do on-device AI with Android, the TK1 is an ideal target.

I.MX8 get AI-acceleration with Movidius Myriad

i.MX8 with MovidiusWith years of experience in building products and writing software for Toradex SoMs around NXP CPUs, with whom Antmicro is also a long-time partner, our demo portfolio would not be complete without highlight the possibilities of doing edge AI on the latest and greatest i.MX8, this time in tandem with a dedicated AI accelerator from Intel. Since Embedded World 2018, where Antmicro showed off early camera support on the debuting Apalis iMX8 QM SoM from Toradex, we’ve made interesting progress and run the iMX8 QM on our Apalis baseboard, and further enabled our customers to turn their i.MX8-based device into an AI-capable solution with extra computing boost from the Intel Movidius Myriad 2/X DNN accelerators. See a demonstrator of this custom platform running a DNN for recognizing objects and people at our main booth, as well as displayed by our partner Toradex in Hall 4, booth 4/410.

FPGA MPSoCs and hybrid systems

High-speed FPGA MPSoCs will be featured prominently as one of Antmicro’s focus areas. The Xilinx UltraScale+ continues to set the pace in many industrial applications, ranging from mobile stereovision devices to handheld broadcasting systems.

X-MineAs the result of the H2020-funded X-MINE initiative for improved mining of strategic minerals, Antmicro will be presenting the prototype of its extendible 3D scanner - a smart, hybrid system based on the UltraScale+ for vision processing and the NVIDIA Jetson TX2 for real-time identification and tracking of valuable ore in harsh mining conditions, first shown at VISION Stuttgart 2018 last fall.

The basis of the X-MINE 3D scanner, a custom hardware platform by Antmicro called the UltraScale+ Processing Module has since been productified and is available as an off-the-shelf developer kit much like our NVIDIA Jetson family of camera-enabled devkits. You will see all Antmicro products on display at the main booth 4A/621.

Perhaps less eye-catching but actually in no way less significant will be a camera-enabled open IP demonstrator, showcasing how Antmicro is using and contributing to open source IP to enable entire FPGA processing pipelines built on open source. The solution, based on the open source LiteX SoC builder and - of course - RISC-V and Zephyr, will feature a MIPI CSI-2 camera, also interfaced with an open IP block, on, you guessed it right, an open hardware Xilinx Zynq/Kintex baseboard designed by Antmicro as part of its open source university outreach program.

The open source based approach should by now not be a surprise to our customers - we recommend it for a variety of reasons. It simplifies hardware/software FPGA design issues (no proprietary cores with unknown bugs!), gives you greater control over your system and makes it easier to collaborate, not to mention saving you the hassle of licensing your cores based on complicated agreements and fee structures. If you’re not sure whether your FPGA design is possible to perform - at least partly - using open source components, be sure to talk to us (so that we can convince you that it is).

RISC-V open platforms

RISC-VThe core of Antmicro’s business is the unique offering of comprehensive software/hardware co-design services, which helps us build smart, extendible and open devices for customers around the globe. With our own tooling, methodologies, long-term relations with silicon vendors and thought leadership in the world’s driving open source centers - the RISC-V Foundation and the Linux Foundation - we are making it easier for our customers to reach for unprecedented design freedom.

A wonderful example of such partnership is that with Thales, announced earlier in 2018, which resulted in this global defense & technology corporation joining the RISC-V Foundation in a strategic effort to navigate towards vendor-agnostic ISAs. Antmicro will be proudly presenting the open source Modular Triple Redundancy RISC-V demonstrator produced for Thales at our main booth, running on the previously mentioned UltraScale+. Interestingly, it was at Embedded World two years ago that Thales approached us in recognition of our leading role in the RISC-V movement. Come and find out what open digital design can do for your next gen product!

Open digital design with Renode

RenodeRenode, our open source simulation framework quickly gaining momentum with usage from partners and customers like Google, Intel and Microchip, will be prominently featured at Antmicro’s main booth to showcase some of the new developments. Originally aimed at radically improving the development and testing workflow of multi-node IoT systems - a fast-growing segment in itself - thanks to its flexibility Renode is quickly finding new use cases, like security research (e.g. Dover Microsystems), pre-silicon development (Microsemi) or ML framework testing (for Google TensorFlow Lite).

If you haven’t heard, just two months ago Microsemi (earlier in 2018 acquired by Microchip) announced PolarFire SoC, an FPGA SoC platform based on RISC-V, cementing its long-running dedication to the RISC-V ecosystem. In an equally forward-looking move, Microsemi had contracted Antmicro to support the upcoming PolarFire SoC platform in Renode so that a freely available pre-silicon development framework would be released to customers the day its physical incarnation was announced! That’s right: you can start developing software for Microsemi’s PolarFire SoC now using Renode 1.6 while waiting for the silicon to ship, and significantly decrease the time it takes to get your PFSoC-based product to market. Microsemi / Microchip will also present their own experience and experiments with Renode in a talk entitled An Open Source Framework for Rapid Application Development for Complex SoCs on Wednesday, February 27th at 2:30 PM at Conference Counter NCC Ost.

On a similar note, we will be showing initial HDL co-simulation capabilities for even better HW/SW co-design experience - a useful perk for developing soft cores and SoCs on FPGAs or entirely new platforms. Adding to that, there are multiple improvements all across the board for both ARM and RISC-V platforms as well as a new UI that is under development for Renode to help non-CLI users be more effective in their development process.

Additionally, as a member of both the Linux Foundation and the Zephyr Project, Antmicro will also be showing a dedicated live Renode CI setup running Zephyr OS on multiple RISC-V and ARM nodes at the Zephyr Project in Hall 4, Booth 4/170. Following Renode’s adoption as the primary testing framework by TensorFlow Lite’s MCU team at Google, Renode is now leading the charge in building the infrastructure for testing complex Zephyr setups; if you’re building an MCU based system, especially heterogeneous and/or featuring multiple nodes, be sure to see the Renode demos at both booths.

The practical implications of an entirely new approach involving actual hardware/software co-design enabled by the functional simulation capabilities of Renode were summarised in a joint paper by Antmicro and cyber-security startup Dover Microsystems to be presented at this year’s talk session. Come and listen to Design Cycle Acceleration for Hardware/Software Co-Design with Renode on Wednesday, February 27th at 12:00 PM in the Conference Counter NCC Ost.

Schedule a meeting

Whether you’re interested in a specific technology, want to discuss ideas for your next-gen edge/embedded device or find out how Antmicro’s experience with open methodologies can bring advantage to your workflow, feel free to book a meeting at the 4A/621 booth by writing to our VP Business Development, Michael, at

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