Open source tools and workflows are becoming increasingly capable in the field of ASIC and FPGA development and implementation, especially in niche applications not addressed by the mainstream, proprietary alternatives. Open source PDKs such as the SkyWater...
As part of the effort to introduce open source tools and building blocks to ASIC development, together with other CHIPS Alliance members, Antmicro has been supporting the Multi-Project-Wafer (MPW) shuttle program, using the first open source 130nm PDK run...
Verilator is a fast, open source simulator widely used in the ASIC and FPGA ecosystem, offering state-of-the-art (or better) results in contexts otherwise dominated by proprietary offerings. Its open source nature and the promise of infinite scaling using...
Antmicro’s open source Renode simulation framework offers support for the Bluetooth Low Energy (BLE) protocol and multi-node simulation capabilities, which makes it a great environment for development, debugging and testing of local area radio networks...
OPEN SOURCE TOOLS, OPEN MACHINE VISION, OPEN SOFTWARE LIBRARIES
OPEN SOURCE TOOLS, OPEN MACHINE VISION, OPEN SOFTWARE LIBRARIES
Raviewer is an open source tool Antmicro has developed to facilitate image preview and debugging in various video-processing environments, wrapped in a nice and simple UI. Now, expanding Raviewer’s capabilities, we have published pyrav4l2, a Python library...
The latest version of Antmicro’s open source simulation framework, Renode 1.13 was released some months ago, bringing a variety of improvements all across the board. Since then, there have been even more updates in the form of 1.13.1 and 1.13.2, reflecting...