While helping customers automate and optimize their workflows, especially in complex use cases like ASIC design, Antmicro often finds itself building and enhancing multi-layered code generation infrastructure, HLS tools, transpilers...
Given the rising demand for AI processing on the edge along with rapid advances in AI model compression through pruning and quantization to 8-bit, 4-bit (and even lower) integers, the configurability, low power and latency...
In August 2019, the IBM-initiated OpenPOWER Foundation open sourced the POWER Instruction Set Architecture (ISA), making it a second major open computer architecture after RISC-V. The decision to open the ISA has created an...
FastVDMA is an open source DMA (Direct Memory Access) controller developed at Antmicro.
One of the main motivations leading to the design of an open source DMA controller was the lack of portable open source alternatives to...
Companies announce partnership and present first demonstrator of a fault-tolerant RISC-V space application at the RISC-V Workshop in Barcelona
Barcelona - May 8th, 2018 - Today at the RISC-V Workshop in Barcelona, Antmicro...