Tagged as:

co-simulation

OPEN SOURCE TOOLS, OPEN HARDWARE, OPEN FPGA, OPEN ASICS

BUILD EMBEDDED SYSTEMS INTERACTIVELY WITH ANTMICRO'S VISUAL SYSTEM DESIGNER

Published:

Visual System Designer Customers interested in building new industrial or consumer devices, typically involving one or more PCBs and based on Linux, Zephyr or Android (or even all of them at the same time), often approach Antmicro before they know...
OPEN SOURCE TOOLS, OPEN MACHINE VISION

GITHUB ACTION FOR V4L2 APPLICATION TESTING IN RENODE

Published:

GitHub action for v4l2 application testing illustration Antmicro’s work with camera systems often results in new reusable tools and libraries helpful for debugging video devices and applications. Some examples of such tools for working with v4l2 pipelines such as grabthecam, farshow
OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

CPU RTL CO-SIMULATION IN RENODE

Published:

CPU RTL co-simulation in Renode Support for co-simulating HDL models in Renode with Verilator has been an integral part of the framework since the 1.7.1 release, introducing a new dimension of flexibility and allowing Renode to cover ASIC and FPGA SoC development...
OPEN NETWORKING, OPEN OS, OPEN SOURCE TOOLS

BLUETOOTH MESH NETWORKING PATHFINDING ALGORITHM DEVELOPMENT USING RENODE

Published:

Distributed system map Antmicro’s open source Renode simulation framework offers support for the Bluetooth Low Energy (BLE) protocol and multi-node simulation capabilities, which makes it a great environment for development, debugging and testing...
OPEN NETWORKING, OPEN OS, OPEN SOURCE TOOLS

DEVELOPING AND TESTING BLE PRODUCTS ON NRF52840 IN RENODE AND ZEPHYR

Published:

Arduino Nano 33 BLE Sense board The Bluetooth Low Energy connectivity standard has gained immense popularity in recent years, mainly due to the growing ubiquity of IoT solutions in both consumer electronics and industry. Thanks to its low-power nature, it...
OLDER NEWER
CLOSE 

TAGS