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dma

OPEN SOURCE TOOLS, OPEN ASICS, OPEN FPGA

SYSTEMC CO-SIMULATION IN RENODE

Published:

SystemC co-simulation in Renode, hero image SystemC is a C++-based system design and verification language and library that allows for modeling of hardware systems, widely used by IP vendors who often provide SystemC-based models for their blocks. Based on community...
OPEN FPGA, OPEN SOURCE TOOLS

OPEN SOURCE HARDWARE ACCELERATOR SUBSYSTEM FOR FPGA/ASICS

Published:

Illustration depicting a chip with VEDLIoT logo Antmicro’s involvement in the VEDLIoT project, an EU-funded initiative aiming at providing a common platform for efficient Deep Learning in IoT has allowed us to develop several open AI/ML ecosystem tools and components which...
OPEN SOURCE TOOLS, OPEN FPGA

ADVANCED CO-SIMULATION WITH RENODE AND VERILATOR: ZYNQ AND FASTVDMA

Published:

Diagram depicting co-simulation of Zynq Co-simulation is extremely useful for developing complex systems, especially those targeting FPGA SoCs, where specialized IP cores often interact with advanced software running on the hard CPU. Co-simulation has been available...
OPEN FPGA, OPEN SOURCE TOOLS, OPEN HARDWARE

MODULAR, OPEN-SOURCE FPGA-BASED LPDDR4 TEST PLATFORM

Published:

LPDDR4 test platform The flexibility of FPGAs makes them an excellent choice not only for parallel processing applications but also for research and experimentation in a range of technological areas. We often provide our customers with flexible...
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