Published:
We are happy to announce our involvement in ‘Very Efficient Deep Learning in IoT’ (VEDLIoT) - a project funded by the European Commission and coordinated by Bielefeld University’s CoR-Lab, launched at the end of 2020. Comprising...
Published:
Throughout 2020 we have been hard at work developing proper, portable SystemVerilog support for multiple open-source FPGA and ASIC design tools used by us and our customers, most notably Yosys and Verilator. We strongly believe...
Published:
For over a year now we have been working together with QuickLogic towards supporting their FPGA devices in open source FPGA tooling. This is the first time in history where an FPGA vendor has gotten directly involved in enabling...
Published:
Version 1.11 of Antmicro’s open source Renode simulation framework is already available. As usual, the new release introduces a range of features, modifications and fixes, enabling developers to design complex embedded IoT...
Published:
The Internet of Things is one of the areas that is hugely benefiting from miniaturization of semiconductor technologies, as more computing power can be encapsulated into increasingly smaller devices. Shrinking in size and requiring...
Published:
While developing FPGA designs it is important to keep track of resource usage and runtime to make sure that your development process is productive and your FPGA hardware delivers the best possible results. This is where one...
