At Antmicro, we work with improving development flows for both software, hardware, FPGA and ASIC design, for which we use, contribute to and produce a wide variety of open source tools.
Verilog, SystemVerilog and open tooling
The newest release of Renode, Antmicro’s open source multi-node simulation framework, adds new exciting pieces to your toolbox, along with support for even more RISC-V platforms and CPUs.
With these new capabilities it’s even...
Being part of the ORConf community since its early days, we’re happy to once again sponsor the event, this time hosted on September 27th-29th, 2019 in Bordeaux, France (https://orconf.org/).
With Antmicro’s CEO Peter Gielda...
From June 11-12th 2019, Antmicro, a Platinum Founding Member of the RISC-V Foundation, will be exhibiting at the RISC-V Workshop Zurich. The stage is set, and the full agenda features talks, demonstrators, an exhibition area...
In today’s rapidly evolving IoT and embedded ecosystem developers have the ability to choose from a variety of platforms and tools to design and build solutions that meet their unique needs and use cases. Zephyr Project is...
Antmicro has recently released Renode 1.7 and 1.7.1, one of the largest updates yet of the open source multi-node simulation framework that has been gaining popularity and showcasing new market implementations in the RISC-V...
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