OPEN SOURCE TOOLS, OPEN FPGA
CO-SIMULATING HDL MODELS IN RENODE WITH VERILATOR
Published:
Antmicro’s open source simulation framework, Renode, was built to enable simulating real-life scenarios - which have a tendency to be complex and require hybrid approaches.
That’s why, besides other things, the Renode 1.7...
Cocotb
One of the great open source tools in our arsenal that we’ve grown very fond of throughout the years is Cocotb, a very clever framework for simulating HDL (VHDL, Verilog or SystemVerilog) designs. Cocotb is maintained...