Published:
The Capability Hardware Extension to RISC-V for Internet of Things (CHERIoT) project provides a hardware platform built around a modified RISC-V Ibex core, designed for enhanced security through limited access of executed applications...
Published:
When developing complex FPGA designs and custom SoCs, simulating and testing HDL designs in a larger context is necessary to accurately replicate real use cases. For fast iteration, you can combine cycle-accurate RTL simulation...
Published:
Testing in simulation is a great way to enable parallel development of software and hardware and ensure quality standards starting early into your project. Renode, Antmicro’s open source simulation framework provides a deterministic...
Published:
SystemC is a C++-based system design and verification language and library that allows for modeling of hardware systems, widely used by IP vendors who often provide SystemC-based models for their blocks. Based on community...
Published:
While landing humans on the Moon was a feat accomplished with very basic compute power of 2MHz provided by the Apollo Guidance Computer, modern spacecraft can take advantage of a much more advanced and capable data processing...
Published:
Hardware design of advanced video processing devices is one of the key areas of activity at Antmicro. With a never-ending pursuit of higher data throughput, signal integrity moves to the forefront of challenges in modern PCB...
