OPEN FPGA
OPEN FPGA

SYSTEMVERILOG LINTING AND FORMATTING WITH FUSESOC - VERIBLE INTEGRATION

Published:

SystemVerilog FuseSoC logos

Although new ASIC design methodologies and tools such as Chisel are on the rise, most ASIC projects still use SystemVerilog, the support of which in open source tools has traditionally lagged behind. This is unfortunate, as using proprietary alternatives...

EDGE AI, OPEN MACHINE VISION
EDGE AI, OPEN MACHINE VISION

A HIGH-SPEED STEREOVISION CAMERA SYSTEM FOR INDUSTRIAL USE CASES

Published:

XMine scanner closed case

At Antmicro, building advanced machine vision systems is our daily bread. While customer projects are always case-specific, we invariably strive to build solutions that employ leading edge computing platforms and, most importantly, are also scalable. This...

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