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OPEN ASICS, OPEN SOURCE TOOLS, OPEN SECURITY / SAFETY

DECREASING THE LENGTH OF DESIGN CYCLE IN CO-DESIGNED SOCS WITH RENODE

Published:

Antmicro Dover An interesting article was published yesterday by All About Circuits on “Decreasing the Length of Design Cycle in Co-Designed SoCs with Renode”. In collaboration with our fellow RISC-V Foundation member, partner and customer...
OPEN HARDWARE, EDGE AI

OPEN HARDWARE CORAL EDGE AI BASEBOARD

Published:

Google Coral Have you heard about Coral? It’s Google’s entry into the embedded hardware market, accommodating Google’s custom AI inference-targeted Edge TPU ASIC in both a standalone embedded platform and a supporting accelerator for edge...

EMBEDDED WORLD 2018: ANTMICRO TECHNOLOGIES AT A GLANCE

Published:

Embedded World 2018 Over the last year, which may well be called groundbreaking for including a sudden surge in edge AI and the open RISC-V architecture paving its way into the market, Antmicro has been involved with technologies that are changing...
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