CAN support in Renode with SocketCAN and Wireshark

LLM optimizations for Ampere GPUs in Kenning

Antmicro’s open source Myra SiP

Support for VeeR EL2 with User Mode and PMP in Tock OS

Open hardware baseboard for CM4 form-factor devices

Renode GitHub Action for automated testing in simulation

Trace-based evaluation of CPU cache usage in Renode

Fast interrupt controller for RISC-V simulated in Renode

sv-bugpoint for improved debugging in SV tools

Open source UVM verification of AXI systems in Verilator

User mode in VeeR EL2 core for Caliptra 2.0

Testing AMP systems with Renode using Zynq UltraScale+

Armv8‑R virtualization support in Renode

Antmicro’s Jetson Orin Baseboard available for purchase from CircuitHub

Parameterizable digital logic design with the Topwrap toolkit

Bazel-orfs for rapid ASIC design iteration with caching

Constrained randomization in Verilator: implementation details

Automated PCB trace selection for SI simulation

Framos and Antmicro announce strategic partnership

OTA updates for NVIDIA BSPs using RDFM

Aethero and Antmicro partner for rapid development of space-rated computers

OTA updates for Zephyr with RDFM

Antmicro sponsors SMC-IT/SCC 2024. Open source systems for space

SystemC co-simulation in Renode

Open source PolarFire SoM

Defining RISC-V CPUs in Renode

Initial assertion control support in Verilator

Component Highlighting on the Open Hardware Portal

Improved filesystem sharing with virtiofs support in Renode

Efficient OTA updates with RDFM and delta packages

Deploying ROS 2 nodes for AI computer vision with Kenning

Recent developments in the Zephyr port for RISC-V

Developing Zephyr and Linux-based PCIe devices with Warp Pipe

Jetson Orin Baseboard Storage Expansion Board

Improving Renode Zephyr Dashboard and Renodepedia

EMI analysis with automated near-field scanning for small devices

Speeding up OpenROAD

Introducing jswasi - a Wasm/WASI runtime for browsers

Virtually recreating the Tesla Roadster with open source

Customizable and scalable GPU cluster

Introducing constrained randomization in Verilator

Kenning Zephyr runtime for edge AI optimization

Comprehensive reporting and logging in Protoplaster

Introducing code coverage reporting in Renode

Add Web-based GUIs with Pipeline Manager

Initial Nuvoton NPCX9 support in Renode

SO-DIMM (LP)DDR5 Rowhammer testing hardware

Developing and testing space systems with Renode

Better image data analysis with Raviewer’s new features

Antmicro’s GMSL video streaming hardware

Analyze Verilator internals with astsee

Physical Memory Protection for the VeeR EL2 RISC-V Core

New features in the MyST Editor

Expanding RISC-V support in Renode with Bit-Manipulation extensions

Multi-node development in Renode for automotive use cases

Introducing the Renode U-Boot dashboard

Accelerator Interface Generator for FPGA-based edge AI solutions

Initial support for Cortex-R5 and Cortex-R8 in Renode

Open source signal integrity analysis

Modular, configurable, multi-OS device fleet management with RDFM

Python-driven automation and scripting in Renode with pyrenode3

Secure & open source ML with Open Se Cura

Running simple UVM testbenches in Verilator

Expanding Renode Zephyr Dashboard

Antmicro's open source Hardware Component Database

New UX improvements in Kenning

Zephyr support for Ambiq Apollo4 Plus

Linux support on 64-bit Cortex-A platforms in Renode

Fully open source FPGA design for SDI-MIPI Video Converter

Pipeline Manager: Improved data validation, subgraphs, QoL changes, and more

Fuzzing Zephyr with AFL and Renode

Renode 1.14 release

DPI support in Renode for HDL co-simulation

Accelerating digital block design with Google’s XLS

Antmicro's Visual System Designer

Accelerating model generation in Verilator

BLE host-guest communication via HCI in Renode

Running LineageOS on NVIDIA Jetson-based devices

Vidar - video aggregation repository

ROS 2 nodes for AI-enabled computer vision tasks

High-speed connectivity for embedded Jetson devices

RISC-V hardware-software co-design using Renode and TBM

Cortex-R support in Renode for safety-critical applications

Open source DDR5 memory vulnerability research

Initial support for STM32WBA in Renode

Zephyr as a bootloader for Linux on RISC-V

Testing ChromiumOS EC in Renode for consumer-grade products

Open source RTL CI testing and verification for Caliptra/VeeR

Testing Zephyr software with Twister, Renode and Robot

Silicon Labs BG22 and MG24 support in Zephyr

Jetson Orin Baseboard 1.1 with Orin Nano

Kenning bare-metal IREE runtime and Renode simulation

Industrial edge AI processing with Kenning

ARMv8-A support in Renode

Antmicro Open Hardware Portal

Simulating NB-IoT networking in Renode

Kintex K410T ASIC prototyping board

OpenTitan support in Renode

OpenTitan for smaller FPGAs and open source tools

Pipeline Manager for Kenning

Testing Zephyr software with CMock, Unity and Renode

Automatic optimization and easier prototyping in Kenning

Integrating the Language Server Protocol in Verible

Open source FPGA designs for the SDI to MIPI CSI-2 Bridge

Video systems with NVIDIA Jetson and FRAMOS cameras

FPGA NVMe accelerator platform for BPF driven ML processing with Linux/Zephyr

GitHub action for v4l2 application testing in Renode

CPU RTL co-simulation in Renode

grabthecam and farshow for camera pipeline development

Progress in open source SV / UVM support in Verilator

Renode support for Microchip’s RISC-V platforms

Baseboard for the NVIDIA Jetson Orin

Flexible and scalable CI with custom GitHub runners

Synchronized multi-sensor data in Renode with RESD

Next-gen SDI-MIPI Video Converter

Benchmarking DNN on NVIDIA Jetson AGX Orin with Kenning

Protoplaster - an automated platform tester

Comparing optimized models with Kenning

Open source CAN core for a custom ASIC

Testing SkyWater MPW designs in Renode

Scaling Verilator for very large designs

Shortest path finding in Bluetooth Mesh using Renode

Live video analysis with Raviewer and pyrav4l2

Renode support for .NET 6

Open source TL to AHB bridges with Cocotb

MyST Markdown editor component

Kenning, TVM and micro-ROS in the meta-antmicro Yocto layer

Building with NVIDIA Jetson AGX Orin

Tracing software execution with Renode

AMD Xilinx Kria UltraScale+ SoM baseboard

F4PGA’s new build system and CLI tool

Deployment pipelines & enhanced modularity in Kenning

Renode support for MAX32650

Renodepedia - the hardware encyclopedia

Running Rust programs in seL4

Initial Renode support for Ambiq Apollo4 Blue

Scalerunner: open source compute cluster

Open Hardware DDR5 Tester

OTA updates for embedded Linux and Android systems

Fully deterministic Linux + Zephyr/micro-ROS testing in Renode

Simulating SoCs with isolated address spaces in Renode

Open source hardware accelerator subsystem for FPGA/ASICs

seL4 userspace debugging with GDB extensions in Renode

Co-developing ML with RISC-V using Renode for Google Research

Faster SoC interconnects with test-driven FPGA development and Cocotb

Renode 1.13 for improved machine learning and pre-silicon development

Antmicro at Zephyr Developer Summit 2022

Open source Snapdragon 625 Baseboard

Reproducible cross-platform edge AI systems with Yocto

Testing Zephyr BLE on nRF52840 in Renode

Open source Snapdragon 845 Baseboard

Precursor: developing advanced products with Renode

Test-driven development of Zephyr + micro-ROS with Renode

Hybrid AI solutions on edge device fleets

Simplifying open source SV synthesis with the Yosys UHDM plugin

CHIPS Alliance forms F4PGA Workgroup

Machine vision with flickerless LED lighting

Smart video solutions with Lattice CrossLink-NX

SBOMS for Embedded Systems with Renode Zephyr Dashboard

Xtensa ISA in Renode for SOF project

Fomu keystroke injector

Zynq mkbootimage open boot image generator

Coroutines for dynamic scheduling in Verilator

Open source data center Rowhammer tester

Software-driven ASICs using SkyWater Shuttle

SATA with open source FPGA tools

RISC-V vector instructions in Renode

Raviewer video data debugging tool

Sharing files between host and Renode

Kenning Runtime

100 Zephyr platforms in Renode’s Zephyr dashboard

OpenLane ASIC build flow with SV support

Debayerization blocks in FPGA

CFU support in Renode

Co-simulation for Zynq with Renode + Verilator

LEON3 support in Renode

FPGA Interchange format

Verible integration with GitHub Actions

Open source DDR test framework for Rowhammer

Open source custom GH Actions runners with GCP and Terraform

Open M.2 Smart IoT Module

Open source SystemVerilog tools in ASIC design

Rust peripheral support in Renode

Zephyr FPGA controller

Initial Bluetooth support for nRF52840 in Renode

High-end, cost-optimized Android devices on Snapdragon

DC-SCM compatible open source BMC platform

Advanced co-simulation with Renode & Verilator

Deep Learning on the edge with Kenning

Antmicro Open Source Portal launched

NVIDIA’s TX2 NX SoM compatible with Antmicro's Open Source Jetson Baseboard

Dynamic scheduling in Verilator - milestone towards open source UVM

Run Linux on BeagleV Starlight in Renode

Antmicro’s ARVSOM RISC-V module announced

Open hardware SDI-MIPI bridge available off the shelf

Renode 1.12 release

Scalenode - server-oriented baseboard for Raspberry Pi 4

ROS-based tester for tracking and detection algorithms

Open-source LPDDR4 test platform

Adopting embedded systems for smart factories

Renode-based CI for TensorFlow Lite MCU

Detection and tracking dataset generator

GitHub Actions self-hosted runners

3D vision pipeline

Using Renode for education, research and demonstration

High-throughput open source PCIe on VU19P

Distant-bes client

UltraScale+ Processing Module released as open source

VEDLIoT launch

Apalis Smart Vision Baseboard released as open source

Ibex support in Verilator/Yosys via UHDM/Surelog

Open FPGA tools and Renode for Core-V MCU

Betrusted’s Precursor and Renode - a user story

RISC-V Summit 2020

Renode 1.11 release

SkyTrack - smart detection and tracking system

RPC DRAM support in LiteDRAM

Multi-band wireless communication in Renode with Zolertia Firefly

FPGA tool performance framework

Open Jetson Nano / Xavier NX baseboard available for purchase

zGlue teams up with Antmicro and Google in Open Chiplet Initiative

Automatic CPU testing with Embench

Speech recognition with I²S in Zephyr and TensorFlow Lite

Linux GUIs on Zynq with FastVDMA, HDMI and Snickerdoodle

seL4 on RISC-V in Renode

Plug-and-play AI acceleration with Thunderbolt

Antmicro’s open source SDI-to-MIPI Bridge

Renode 1.10 release

Android on open Jetson Nano / Xavier NX baseboard

PolarFire SoC Icicle Kit with Antmicro’s HDMI board

Antmicro joins the OpenPOWER Foundation - Q&A

SweRV and open tooling

Jetson Nano / Xavier NX with 10Gb Ethernet Controller

SkyWater open PDK release

Renode 1.9: new platforms, RISC-V improvements, dual radio & more

Antmicro’s TX2 platform released as open hardware

Multi-core VexRiscv in Litex

Microwatt and the POWER ISA support in Renode

Updated Jetson Nano/Xavier NX open source baseboard

SystemVerilog linting and formatting in FuseSoC

Open source hardware dual camera module for stereovision

Open hardware FPGA video platform

Open HW QuickFeather board

Open computing at the edge: EW 2020

High-speed stereo camera for industrial use cases

CivetWeb in Zephyr

Single Object Tracking for ROS

SDI/HDMI to HDMI/MIPI smart converter/streamer

Speeding up builds with Remote Execution API

Open source Alvium drivers for TX2 (and Nano)

Renode support for QuickLogic EOS S3 SoC

Antmicro and zGlue release rapid turnaround chiplet-based GEM ASIC

TFLite in Zephyr

Open USB test suite

Antmicro exhibits at RISC-V Summit 2019

Open SystemVerilog Test Suite

Jetson Xavier™ NX with Antmicro's Open Source Jetson baseboard

EtherBone support in Renode

pyvidctrl tool for managing camera settings

Singularity at Antmicro

Time Sensitive Networking in Zephyr

Renode 1.8: EtherBone co-simulation, more RISC-V platforms

Updated Jetson Nano Baseboard + ALVIUM cameras

FastVDMA: an open DMA controller by Antmicro

Renode + Verilator HDL co-simulation

Zephyr on Zynq UltraScale+ Cortex-R5

Multi-core debugging with GDB in Renode

Automated cloud builds for edge AI devices

Verilog simulation with Cocotb and Verilator

Get Started with Zephyr on RISC-V

Renode 1.7 with Microchip SAME70, TSN, Verilator co-simulation

Open Jetson Nano AI board gets Data Modul HMI

Antmicro's open Android BSP for Apalis TK1

Security IP HW/SW co-design with RISC-V and Renode

Open hardware Coral baseboard

Open hardware NVIDIA Jetson nano baseboard

Open digital design

Renode 1.6 with RISC-V PolarFire FPGA SoC

Jetson Xavier + Antmicro AI + Allied Vision cameras

i.MX8 + Movidius AI accelerator

Open Triple Modular Redundancy demonstrator with Zephyr on UltraScale+